--- type: product schema_version: 1 stock_number: "85865-1" canonical_url: "https://www.artisantg.com/TestMeasurement/85865-1/Dynamic-Engineering-PMC-Serial-III-LM6-Multi-Function-Interface" json_url: "https://www.artisantg.com/TestMeasurement/85865-1/Dynamic-Engineering-PMC-Serial-III-LM6-Multi-Function-Interface.json" generated_at: "2026-11-07T09:45:46.095Z" last_updated: "2026-09-30T05:40:42.033-05:00" --- # Dynamic Engineering PMC Serial III-LM6 Multi Function Interface _Summary and Categories are this item's record. The description sections and FAQ are machine-assisted and can contain errors; where they disagree with the record, the record is correct, and where description sections disagree with each other, Details wins._ ## Summary - Manufacturer: Dynamic Engineering - Model: PMC Serial III-LM6 - Condition: Used and in Excellent Condition - Price: $800.00 USD - Availability: In stock, 1 available - Warranty: 1-Year Warranty with 30-Day Return Guarantee - ITAR restricted: No - Shipping weight: 1.5 lb, estimated - Shipping dimensions: 9X9X3 in, estimated ## Categories - Test Equipment > Electrical Test > Digital I/O (primary) - Military and Embedded Equipment > Embedded & Industrial > PMC ## Details This Dynamic Engineering PMC Serial III-LM6 Multi Function Interface is used and in excellent condition. The PMC Serial III-LM6 is a custom interface providing four I/O channels each consisting of LVDS transmit and receive data and clock. The on-board PLL is used to generate the two clocks required for the design. The PLL is programmable, and uses a 40 MHz reference oscillator to generate a wide range of frequencies. The target rates for this design are 10 Mbits/sec for channels zero and one and 62.5 Mbits/sec for channels two and three. Data for all channels is received MSB first using start and stop bits to separate data words. Channels zero and one send and receive 36-bit words (packets) consisting of two start bits (Œ1¹s) a 32-bit data field a parity bit and one stop bit (Œ0¹) with data changing on the falling edge of the clock (stable on the rising edge). The parity bit is calculated using even parity over the data field. A data frame is terminated with an idle packet consisting of a 36-bit word of all Œ0¹s. When no data is being sent, the data line remains in a Œ0¹ state. Channels two and three use different formats for transmitted and received data. A transmit packet consists of one start bit (Œ1¹), a 32-bit data field, an odd parity bit and one stop bit (Œ0¹) for a total of 35 bits. The received data-word is 66 bits long consisting of one start bit (Œ1¹), a 64-bit data field and one stop bit (Œ0¹). Each data-frame begins with a sync word in the upper-half of the first data word. If this is not seen, data will still be stored, but a framing error will be latched. Parity is not used on this interface. Both interfaces have data changing on the rising edge of the clock (stable on the falling edge). ## Images - - -