cPCI-SyncClock32 Brandywine Communications 3U Bus-Level Timing Board

The Brandywine Communications / JXI2 cPCI-SyncClock32 3U Bus-Level Timing Board provides precision time with zero latency to the host computer over the CPCI bus in the 3U form factor.

An on-board microprocessor automatically synchronizes the clock to reference signal inputs. The reference signal inputs can be 1 PPS, IRIG or NASA time codes and optionally, GPS or Have Quick. The clock can free run and be set by commands from the host over the CPCI bus.

The on-board clock accepts an IRIG A, B, or NASA 36 input and accepts user input reference input signal delay information. An IRIG B code generator is also manufactured.

The advanced microprocessor on the PCI-SyncClock32 module constantly measures the time error between the onboard clock and the reference input code and adjusts the error measurement for propagation delay. In units with a disciplined TCXO or OCXO the residual error is used in an adaptive gain loop to adjust the frequency of the oscillator for minimum error. If the incoming time code is missing, or corrupted by noise, the on-board clock is updated using the disciplined 10 MHz oscillator. When the input code is again useable the correction loop is smoothly closed.

BCD time data is available to the host computer using two zero latency time reads. The time message contains units of microseconds through units of years. A status word is manufactured using an additional read.

The time-of-occurrence of random external events may be captured (time-tagged) by using the Event Time input. When the event input is sensed the current time is saved in a buffer for later interrogation by the host. The resolution of the time tag is 100 nanoseconds.