CDS 73A-541 Universal Digitizing Counter Module with Time Tag Memory

The 73A-541 Universal Digitizing Counter (UDC) Module with Time Tag Memory is a printed circuit board assembly for use in a card cage conforming to the VXIbus Specification. The 73A-S41 provides two channels that can measure signals in the sub-Hertz to 10-Mhz frequency range.

The 73A-541 Module incorporates both a Universal Timer/Counter and a Digitizing Counter into a single instrument, operating in either of two modes:
1) The Timer /Counter mode includes the measurement functions associated with a traditional universal counter: frequency, event count, period, period average, pulse width, pulse width average, time interval, time interval average, duty cycle, and duty cycle average.
2) The Digitizing Counter mode using Time Tag Memory has two real-time and two post-processing sub-modes. In this mode, an input signal can be analyzed on a cycle-to-cycle basis by storing the absolute time of each successive transition of the input waveform in a 28-bit by 2048-word memory.

Storing the absolute transition times of a waveform effectively digitizes its time domain information and allows complex analysis, even on one-time phenomena. Some of the measurements that can easily be performed include time-interval relationships between two waveforms, or the frequency, period, pulse width, and duty cycle characteristics of a single waveform, on a cycle to cycle basis.

The real-time sub-modes allow measurement data to be read "in-progress" (during operation) without interrupting new data capture. The post-processing sub-modes allow data to be read after the measurement cycle is complete.

The 73A-541 Module offers several different ways to control the duration of the measurement cycle (or gate duration). For frequency and event-count functions in the Timer/Counter mode, or when using the Digitizing Counter mode using Time Tag Memory, the measurement cycle may be controlled by:
• A specified number of A or B events
• A specified amount of time from 1 microsecond to 427 seconds
• Direct program control
• An external gate
• Under program control, both counter inputs and the gate input may be driven by front panel BNC inputs or by any of the eight TTL TRG lines on the VXIbus backplane. A re-conditioned TTL output for each counter input is provided as a BNC output on the front panel, and each may be connected to any of the eight VXIbus TTL TRG outputs under program control.

Six SMB jacks at the front edge of the card provide easy access for the two input channels, the A-and-B reconditioned TTL outputs (normal and inverted), and the external gate and clock inputs.

Seven LEDs at the front edge of the card visually indicate A and B channel triggering, gate status and operating status, as well as showing that the required power supplies are present, and whether or not the 73A-541 has entered a "Failed" condition. An LED also indicates when the module is processing a VMEbus cycle.