LS-55-P2 Lumistar PCM Decommutator

The Lumistar LS-55-DD PCI Dual Multi-Function PCM Decommutator manufactures two multifunction decoms and two optional bit synchronizers (LS-45) in a single PCI card slot. The multi-function decoms are implemented in FPGA using a next generation design based on the LS-50-P. The simulators, decommutators, time code reader and time code generator are achieved on the main board and the bit synchronizer is achieved through a low-profile daughterboard. CVSD voice, h.261 video, and IRIG Chapter 8 decoding are achieved through software.

The IRIG Time Code Reader and Generator operate with IRIG A, B, or G time codes. The Time Code Reader is typically used to insert time information into the PCM minor frame block of data. The Time Code Generator creates and outputs time information in accordance with the IRIG Time Code Standards. Both reader and generator are capable of operating at 1/2, 1, and 2 times the normal rate.

The dual decoms can be used for extremely large formats (65,536 words per minor frame up to 1,024 frames deep) and contains dual ping-pong data output buffers with up to 128K bytes of memory. The second decom can be used for an independent PCM data stream or an embedded data stream in accordance with the IRIG-106 Standard.

The dual PCM simulator generates common, unique, and waveform pattern data words or pseudo-random test pattern (11 through 25 bit) to allow bit error loop calculations to be performed. The two simulators can be used to generate complex data streams with embedded PCM data, or two totally independent data streams. Five-pole Butterworth pre-modulation filtering is provided with 8 selectable data rates on each simulator from 100 Kbps to 20 Mbps.