Asus SBC-455 Half-size 486 CPU Card with Flat Panel/CRT SVGA Interface

The Asus / Aaeon SBC-455 Half-size 486 CPU Card with Flat Panel/CRT SVGA Interface is an all-in-one single board 486 computer with an onboard flat panel/CRT SVGA controller. It packs all the functions of an industrial computer and its display capabilities onto a single, halfsize card. This means the SBC-455 is your absolute best solution for embedded applications. The on-board PCI-bus, flat panel/CRT SVGA controller uses the CHIPS 65548 chipset with up to 1 MB of video memory. This chipset, used with the local PCI-bus, enables 32-bit graphic throughput at up to 33 MHz. Excellent for display-intensive applications, it supports various LCD types including TFT, STN, B/W, and EL. Another feature of the SBC-455 is the inclusion of a high speed, local bus IDE controller. This controller supports (through ATA PIO) mode 3 and mode 4 hard disks, enabling data transfer rates in excess of 11 MB/second. Up to four IDE devices can be connected, including large hard disks, CD-ROM drives, tape backup drives, or other IDE devices. The built-in, enhanced IDE controller provides a 4-layer, 32-bit, posted write buffer and a 4-layer, 32-bit read-prefetch buffer to accomplish IDE boost performance improvements. On-board features include two high speed RS-232 serial ports with 16C550 UARTs, one bidirectional SPP/EPP/ECP parallel port and a floppy drive controller. In addition to the 486's 16 KB of on-chip cache memory, the SBC-455 includes an extra 128 KB of second level on-board cache memory. If program execution is halted by a program bug or EMI, the board's 16-stage watchdog timer can automatically reset the CPU or generate an interrupt. This ensures reliability in unmanned or standalone systems. The SBC-455 supports 5 V EDO DRAM. It also provides two 72-pin SIMM (Single In-line Memory Module) sockets for its on-board system DRAM. These sockets give you the flexibility to configure your system from 1 MB to 64 MB of DRAM using the most economical combination of SIMMs.