276-501 Red Rapids Analog Interface Option / Digital Signal Processing Architecture

The Red Rapids 27x SigStream Series Analog Interface Options / Digital Signal Processing Architectures are assigned a six-digit model number (Model XXX-YYY) that uniquely identifies the specific hardware features of that unit. The first three digits are the primary designator used to convey information about the structure of the analog front-end. The last three digits define the build options to tailor the product to a specific application.

All of the SigStream primary model number designators define the specific characteristics of the receiver and/or transmitter channels of the analog front-end. Please note that the actual sample rate is defined by the synthesizer build option and not necessarily the maximum rate supported by the channel.

There are several build options within each primary designator.

The synthesizer frequency can be set to any value between the minimum and maximum sample rates supported by the front-end. Fixed frequency synthesizers are typically used to minimize phase noise, but programmable synthesizers are also manufactured to cover a range of frequencies. Please note that the Model 276 synthesizer frequency is set to half the desired sample rate.

The SigStream products are manufactured in three different form factors; PCIe, XMC, and CCXMC. Although these options are self-explanatory, it is worth noting that some PCIe products are actually XMC boards mounted to a PCIe/XMC carrier. They behave the same as a native PCIe product.

All of the SigStream products support AC coupling at the analog RX/TX interface and most also support DC coupling. The DC coupled option is only necessary when frequencies below a few hundred kilohertz are important.

Some of the SigStream products have individual coaxial clock and trigger inputs while others have a single connector that must be configured as one or the other. The CLK/REF option accepts either a 10 MHz reference to phase lock the on-board frequency synthesizer, or an external sample clock to bypass the synthesizer. The TRIG option accepts either an external trigger to control channel processing or a 1 PPS timing source to synchronize the on-board time of day clock. The coaxial trigger input can be terminated into 50 ohms or a high impedance (HI-Z) buffer.

The GPIO connector receives external triggers that can be used to control channel processing. The electrical interface supports 3.3 V LVCMOS, 2.5 V LVCMOS, 1.8 V LVCMOS, or LVDS signaling standards.

Most SigStream products offer digital down converter (DDC) resources to optionally tune and filter the raw sample data. There are multiple DDC architectures to address specific application requirements.