SBS IP-Altera-TTL / IP-Altera-TTL-RO Digital I/O IndustryPack Module - TTL Interface

The GE Fanuc / SBS / Greenspring IP-Altera is a single-wide IndustryPack with 28 lines of digital I/O. It comes with a complete Altera design file-set that can be used as an effective starting point for customers implementing their own custom digital interface or protocols in Altera logic. It is ideally suited for interfacing to systems using non- standard communication protocols such as satellite and other aerospace test systems.

The IP-Altera uses an Altera 10K40-3 FPGA with 20 differential I/O lines and 8 digital TTL I/O lines. Users must have their own Altera Development System in order to implement their own designs. SBS GreenSpring provides the Altera design for the IndustryPack bus control interface, an example of digital I/O, an interrupt implementation, and ID PROM. The 10K40-3 supports the 32 MHz IP Specification with 1 wait state.

The direction of each of the I/O lines is programmable. Each of the differential lines has a separate output enable bit while the TTL lines may use tri-state buffers. The TTL lines use SBS GreenSpring's LineSafe ESD protection circuit. The differential lines have socketed termination resistors. A 1.5 V reference output is provided on one of the I/O pins. This allows the differential receivers to be used as TTL inputs by connecting the minus side of the input to the reference.