AIM ACI429-16 PXI Card
This AIM ACI429-16 PXI Card is new from surplus stock. It comes with interface connector with back shell.
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Stock # 56137-1
Description:
This AIM ACI429-16 PXI Card is new from surplus stock. It comes with interface connector with back shell. Show Description
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AIM ACI429-16 PXI Card
Features
- Software-Programmable Tx/Rx Channels
- Full Error Injection and Detection
- Onboard Application Support Processor
- ...
- Sort by SDI Field
- Real-Time Recording and Post
Description
The AIM ACI429 modules are members of AIM's new family of advanced CompactPCI-Bus modules for analyzing, simulating, monitoring and testing of avionic databus systems....
The ACI429 provides eight or sixteen fully configurable ARINC429 channels on a 3U form factor CompactPCI-card, whereby the eight channel board is an assembly variant of the ACI429 sixteen channel board. Each channel can be individually configured by software as a transmit or receive channel with different front plate connector outputs and inputs.
On transmit channels, the ACI429 acts as an autonomously operating bus traffic simulator, supporting multiple modes of transmission sequencing. Full error injection capabilities are available, whereby the error injection is programmable individually for each channel and label. For a special transmission operating mode, the parity bit can be used alternatively as an additional data bit. The output level and the rise and fall time of the bus signals are individually programmable by software for each transmit channel.
For the receive channels the ACI429 provides an advanced monitor and analyzer function, with unique on-board error detection, triggering and filtering capabilities. The rise and fall time of the bus signals are individually programmable for each receive channel.
Both functions are available concurrently and independent from each other. The hardware architecture provides resources to guarantee that the performance of one function is not affected by the current load of another function. The hardware architecture provides enough resources (i.e. processing capability and memory) to guarantee, that all specified interface functions on all channels are fully available concurrently. The on-board processing capabilities and the large memory size of the DRAM enables autonomous operation with a minimal interaction of the PC host processor.
The advanced architecture uses two processors, the powerful 64bit RISC processor (ASP) assists and supports the application and driver software tasks, and expands the capability of the ACI429 modules to that of a high level instrument. To fulfill the real-time requirements of avionic type databus systems a high performance, a 32bit RISC processor (BIP) is implemented on the Bus Interface Unit (BIU).
An IRIG B Time Code Decoder is implemented on the ACI429 boards to satisfy the requirements of 'multi-channel time tag synchronization' on system level.The AIM ACI429 modules are members of AIM's new family of advanced CompactPCI-Bus modules for analyzing, simulating, monitoring and testing of avionic databus systems.
The ACI429 provides eight or sixteen fully configurable ARINC429 channels on a 3U form factor CompactPCI-card, whereby the eight channel board is an assembly variant of the ACI429 sixteen channel board. Each channel can be individually configured by software as a transmit or receive channel with different front plate connector outputs and inputs.
On transmit channels, the ACI429 acts as an autonomously operating bus traffic simulator, supporting multiple modes of transmission sequencing. Full error injection capabilities are available, whereby the error injection is programmable individually for each channel and label. For a special transmission operating mode, the parity bit can be used alternatively as an additional data bit. The output level and the rise and fall time of the bus signals are individually programmable by software for each transmit channel.
For the receive channels the ACI429 provides an advanced monitor and analyzer function, with unique on-board error detection, triggering and filtering capabilities. The rise and fall time of the bus signals are individually programmable for each receive channel.
Both functions are available concurrently and independent from each other. The hardware architecture provides resources to guarantee that the performance of one function is not affected by the current load of another function. The hardware architecture provides enough resources (i.e. processing capability and memory) to guarantee, that all specified interface functions on all channels are fully available concurrently. The on-board processing capabilities and the large memory size of the DRAM enables autonomous operation with a minimal interaction of the PC host processor.
The advanced architecture uses two processors, the powerful 64bit RISC processor (ASP) assists and supports the application and driver software tasks, and expands the capability of the ACI429 modules to that of a high level instrument. To fulfill the real-time requirements of avionic type databus systems a high performance, a 32bit RISC processor (BIP) is implemented on the Bus Interface Unit (BIU).
An IRIG B Time Code Decoder is implemented on the ACI429 boards to satisfy the requirements of 'multi-channel time tag synchronization' on system level.The AIM ACI429 modules are members of AIM's new family of advanced CompactPCI-Bus modules for analyzing, simulating, monitoring and testing of avionic databus systems.
The ACI429 provides eight or sixteen fully configurable ARINC429 channels on a 3U form factor CompactPCI-card, whereby the eight channel board is an assembly variant of the ACI429 sixteen channel board. Each channel can be individually configured by software as a transmit or receive channel with different front plate connector outputs and inputs.
On transmit channels, the ACI429 acts as an autonomously operating bus traffic simulator, supporting multiple modes of transmission sequencing. Full error injection capabilities are available, whereby the error injection is programmable individually for each channel and label. For a special transmission operating mode, the parity bit can be used alternatively as an additional data bit. The output level and the rise and fall time of the bus signals are individually programmable by software for each transmit channel.
For the receive channels the ACI429 provides an advanced monitor and analyzer function, with unique on-board error detection, triggering and filtering capabilities. The rise and fall time of the bus signals are individually programmable for each receive channel.
Both functions are available concurrently and independent from each other. The hardware architecture provides resources to guarantee that the performance of one function is not affected by the current load of another function. The hardware architecture provides enough resources (i.e. processing capability and memory) to guarantee, that all specified interface functions on all channels are fully available concurrently. The on-board processing capabilities and the large memory size of the DRAM enables autonomous operation with a minimal interaction of the PC host processor.
The advanced architecture uses two processors, the powerful 64bit RISC processor (ASP) assists and supports the application and driver software tasks, and expands the capability of the ACI429 modules to that of a high level instrument. To fulfill the real-time requirements of avionic type databus systems a high performance, a 32bit RISC processor (BIP) is implemented on the Bus Interface Unit (BIU).
An IRIG B Time Code Decoder is implemented on the ACI429 boards to satisfy the requirements of 'multi-channel time tag synchronization' on system level.
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