PBT-315C Curtiss-Wright PCI Bus Analyzer

The Curtiss-Wright / VMETRO PBT-315 PCI Bus Analyzer is a single-slot PCI short card that contains a complete logic analyzer for the PCI bus. The unit is able to monitor and trigger on all bus activity in 32-bit as well as 64-bit PCI bus motherboards through a PCI expansion slot. This is a remarkable amount of functionality and performance in an extremely small package.

PROTOCOL-SENSITIVE BUS SAMPLING:
One of the most fundamental properties of the PBT-315 is the protocol-sensitive sampling of bus cycles for state analysis. Unlike general-purpose logic analyzers, VMETRO bus analyzers know the bus protocol of the target bus to ensure that sampling takes place at the right moments. This gives a trace that includes all kinds of bus activity, like arbitration, interrupts, cache cycles etc., and it ensures that the bus is not sampled at unimportant times.

POWERFUL TRIGGER & STORE QUALIFIERS:
To narrow in on the cycles of interest, the PBT-315 is equipped with powerful triggers and store qualifiers, based on four full-width word recognizers and a flexible 16 level sequencer. Each of the word recognizers offers powerful operators like RANGE, NOT and BINARY for address and data fields etc., and the user may specify signal values as hex, binary or mnemonics like "MemRd", "IOWri", etc. This eliminates the need for the user to remember the actual signal values for the different cycle types etc.

STATISTICS OF BUS TRAFFIC PATTERNS AND PERFORMANCE:
Substantial amount of hardware is built into the PBT-315 to perform real-time statistics and performance measurements on PCI. Hardware event counters tied to the word recognizers provide powerful and responsive measurements of event occurrence and bus utilization. There are also trace based statistics, like the Bus Transfer Rate measurement.

EXPANDABLE:
Although the PBT-315 offers substantial performance and functionality in itself, a family of powerful piggyback modules is planned. These will further enhance the capabilities of the analyzer while still occupying only a single slot. The planned modules include a High-speed Timing Analyzer and a PCI Protocol Checker.