PMC Serial III-LM6 Dynamic Engineering Multi Function Interface

This Dynamic Engineering PMC Serial III-LM6 Multi Function Interface is used and in excellent condition.

The PMC Serial III-LM6 is a custom interface providing four I/O channels each consisting of LVDS transmit and receive data and clock. The on-board PLL is used to generate the two clocks required for the design. The PLL is programmable, and uses a 40 MHz reference oscillator to generate a wide range of frequencies. The target rates for this design are 10 Mbits/sec for channels zero and one and 62.5 Mbits/sec for channels two and three.

Data for all channels is received MSB first using start and stop bits to separate data words. Channels zero and one send and receive 36-bit words (packets) consisting of two start bits (Œ1^¹s) a 32-bit data field a parity bit and one stop bit (Œ0^¹) with data changing on the falling edge of the clock (stable on the rising edge). The parity bit is calculated using even parity over the data field. A data frame is terminated with an idle packet consisting of a 36-bit word of all Œ0^¹s. When no data is being sent, the data line remains in a Œ0^¹ state.

Channels two and three use different formats for transmitted and received data. A transmit packet consists of one start bit (Œ1^¹), a 32-bit data field, an odd parity bit and one stop bit (Œ0^¹) for a total of 35 bits. The received data-word is 66 bits long consisting of one start bit (Œ1^¹), a 64-bit data field and one stop bit (Œ0^¹). Each data-frame begins with a sync word in the upper-half of the first data word. If this is not seen, data will still be stored, but a framing error will be latched. Parity is not used on this interface. Both interfaces have data changing on the rising edge of the clock (stable on the falling edge).